In an image sensor for taking images, a structure having comparators that compare pixel outputs and a ramp-shaped reference potential and ripple counters for measurement of times that elapse before the magnitude relations between the pixel outputs and the reference potential are reversed with respect to each column has been proposed (see Patent Document 1 (JP-A-2006-33453) and Patent Document 2 (JP-A-2005-278135)).
FIG. 1 shows a typical circuit example having a comparator and a counter. FIG. 2 is a timing chart of the circuit in FIG. 1. In the circuit shown in FIG. 1, sweeping of the reference voltage Vramp is started in the comparator 1 and the count operation of the counter 2 is started at the same time. When the reference voltage Vramp is below the input voltage VSL, the output signal VCO of the comparator 1 is inverted from the high level to the low level. At the falling edge, the count operation of the counter 2 is stopped. The count value VCNT has a one-on-one relationship with the voltage width swept by the reference voltage Vramp, and the count value VCNT is a result of analog-digital (AD) conversion of the input voltage.
In Patent Documents 1, 2, the ripple counters are used as the counters, and subtraction is realized by inversion of the respective bits of the ripple counters. Further, the addition operation is realized by holding the count value of the first data and continuously operating the ripple counter for the next data. In this configuration, the CDS (Correlated Double Sampling) operation, which is often performed in an image sensor, is independently performed with respect to each column, and thus, the AD conversion results of the pixel outputs do not depend on the clock signals between the columns and the skew of the reference potential. As a result, the count operation can be performed using the faster clock signals. Further, addition and subtraction of the AD conversion results with respect to each column can be performed, and thus, there is an advantage that the addition operation of the pixel outputs within the same column may be performed on the AD conversion circuits.